Inherent variations in the CMOS IC fabrication process produce component elements, e.g. capacitors, resistors, transistors etc., that have very poor absolute characteristic tolerances. For example, absolute tolerances of fabricated elements range from 10% to 20%. However, using ratio matching, it is possible to fabricate two or more elements, of the same type, whose characteristics are very closely matched, even though the absolute tolerance may vary more widely. For example, matching tolerances of 0.5% may be achieved.
It is sometimes required to provide relatively high accuracy timing signals in CMOS ICs. For example, it may be required to fabricate a ramp signal generator of relatively tight absolute frequency and amplitude accuracy. A ramp signal generator, however, requires two types of elements: a current source and a capacitor. While it is possible to match the characteristics of two or more current sources, or of two or more capacitors, it is not possible to accurately match a current source to a capacitor. Because of this, variations of 20% to 40% of ramp timing for ramp signal generators may occur.
It is desirable to fabricate a timing signal generator, such as a ramp signal generator, which provides the required accuracy of the frequency and amplitude of the ramp signal despite the inherent component characteristic variations inherent in the IC fabrication process.
In accordance with principles of the present invention, a timing signal generator includes a source of a controlled current, a timing capacitor coupled to the controlled current source for generating the timing signal, and a feedback circuit coupled to the controlled current source for controlling the controlled current source to produce a predetermined controlled current.
The feedback circuit provides dynamic control of the current, permitting accurate timing signals, despite component characteristic variations inherent in the IC fabrication process.